Products Overview

Computational Lithography and Defect Management

The suite of Luminescent computational lithography and defect management products is designed to address three very important phases of advanced computational lithography and defect management— lithography process development; photomask synthesis, and photomask defect management. These products run on a highly scalable hardware platform offering both speed and accuracy.

Inverse Explorer™

In advanced lithography process development such as for 22nm and beyond technology nodes, R&D engineers need to explore the limits of a scanner's capabilities and mask technologies relative to a target chip design. Inverse Explorer is the family of solutions that provides lithography simulation and optimization tools for this advanced litho process development. With an application like Source-Mask Optimization, litho engineers can determine a range of illumination source shapes and corresponding mask patterns for a given set of design patterns that will yield an acceptable process window. Source shapes can range in complexity from standard shapes to free-form shapes. Mask patterns can range from "ideal" masks to "manhattanized" masks that conform to a set of manufacturing rules. With Design Rule Developer, customers can extract the necessary design rules to feedback to chip designers. With this knowledge, chip designs can ensure that their designs are manufacturable.

Inverse Synthesizer™

After exploring the lithographic process window and finalizing key litho parameters such as the illumination source and SRAF rules, OPC engineers utilize Inverse Synthesizer's Full Chip Mask solution to synthesize a complete mask layer. Inverse Synthesizer is based on ILT and automatically converts a full-chip design pattern into a manufacturable mask for various layers such as poly, contact, and metal, enabling an optimum set of wafer imaging results.

Luminescent Automated Image Processing Hub (LAIPH™)

Utilizing the LAIP product, production mask engineers can enhance mask defect images to clearly see the criticality of mask defects. By improving the definition of the DUV scanner aerial images and post-resist wafer images, defect analysis throughput is increased to 60 to 300 defects per minute with much higher accuracy.